The present invention relates to a semiconductor chip-mounting board wherein a semiconductor chip is connected to a semiconductor chip-mounting face by a flip chip-mounting method, and electrodes formed on a circuit board-mounting face opposed to the semiconductor chip-mounting face are electrically connected to electrodes on a circuit board, and a method for mounting the semiconductor chip to the semiconductor chip-mounting board.
Wire bonding using metallic wires has been widely employed heretofore to electrically connect electronic microcircuit elements such as semiconductor chips or the like with electrode terminal parts on a circuit board. However, with the recent higher integration tendency in semiconductor chips and the increase of terminals. The narrowing of connection pitches has resulted. At the same time, personal computers, portable remote terminals, etc. need efficient use of a mounting area on the semiconductor chip. Because of this, a flip chip-mounting method is adopted lately whereby bumps (projecting terminals) are formed on electrode terminals on the semiconductor chip and are directly connected with electrodes on the circuit board by a bonding material, and besides, a minute bonding and mounting technique to resin circuit boards with low cost performance is required.
A semiconductor chip-mounting board having a semiconductor chip mounted according to the conventional flip chip-mounting method and a method for mounting a semiconductor chip to the semiconductor chip-mounting board will be described with reference to the drawings.
FIG. 6 is a plan view of a conventional semiconductor chip-mounting board 4 with a semiconductor chip 1 mounted thereon. FIG. 7 is a sectional view taken along the line III--III of FIG. 6, and FIG. 8 is a sectional view taken along the line IV--IV of FIG. 6. A reference numeral 20 in FIG. 6 is a through hole penetrating a semiconductor chip-mounting face 4a and a circuit board-mounting face 4b of the semiconductor chip-mounting board 4 to electrically connect the semiconductor chip with a circuit board.
On a circuit formation face 1a of the semiconductor chip 1 are formed electrode terminals 13 via an interval of 120 .mu.m in a peripheral part of the semiconductor chip 1. The electrode terminals 13 which are necessary for general functions of the semiconductor chip are provided with bumps 6 each having a two-step projection of a large diameter part 6a and a small diameter part 6b. The bump 6 is formed of gold of 75 .mu.m larger diameter and 45 .mu.m height.
On the other hand, the conventional semiconductor chip-mounting board 4 is formed of glass epoxy resin, having a thermal expansion coefficient of 13 ppm and a glass transition point of 115-120.degree. C. Strip-shaped bonding lands 2 are formed every 120 .mu.m at positions of the semiconductor chip-mounting face 4a of the board 4 corresponding to electrode terminals 13 formed on the semiconductor chip 1. A width w2 of the bonding land is 50 .mu.m. As indicated in FIG. 8, the bonding land 2 extends a length L2 from a contact point 6c thereof to the bump 6 towards a central part 107 of the semiconductor chip 1. The above L2 is conventionally 35 .mu.m. Moreover, as shown in FIG. 9, a solder resist 9 is formed a distance r2 separated from an end face 1b of the semiconductor chip 1 at the semiconductor chip-mounting face 4a of the board 4. The r2 is conventionally 200 .mu.m.
A method for mounting the semiconductor chip 1 to the conventional semiconductor chip-mounting board 4 will be described.
In the first place, the above-described bumps 6 are formed at the electrode terminals 13 of the semiconductor chip 1 functionally required for the normal operation, that is, terminals necessary for inputting/outputting signals to the circuit board via the mounting board 4. A bonding material 7 of conductive resin paste mainly composed of silver is previously transferred by a thickness of approximately 10 .mu.m to the bumps 6.
Meanwhile, the semiconductor chip-mounting board 4 is mounted to the circuit board according to the surface mounting technology (SMT), and is cleaned thereafter.
Then, as shown in FIG. 6, the semiconductor chip 1 having the bumps 6 to which the bonding material 7 is transferred is electrically bonded by the bonding material 7 via the bumps 6 to the bonding lands 2 formed at the semiconductor chip-mounting face 4a of the board 4. After the bonding material 7 is dried at 120.degree. C. for two hours thereby to be set, a sealing resin 8 is injected between the semiconductor chip 1 and the semiconductor chip-mounting face 4a, and set by heating at 120.degree. C. for two fours. FIG. 10 shows the semiconductor chip-mounting board 4 having a plurality of semiconductor chips 1 mounted thereon. The sealing resin 8 is applied from one side of the semiconductor chip 1 in a direction indicated by arrows 12 by a dispenser. Where to inject the sealing resin 8 is suitably selected depending on a shape of the semiconductor chip 1 or a distance to the peripheral lands.
The conventional semiconductor chip-mounting board 4 in the structure and the mounting method have the following disadvantages.
Since a bonding strength between the bump 6 of the semiconductor chip 1 and the bonding land 2 on the mounting board 4 is as small as about 3 g per bump, the semiconductor chip 1 with a small count of electrode terminals 13 is poorly bonded to the mounting board 4. Moreover, the bonding material 7 cannot form a sufficient fillet due to a small area of the bonding land 2, and rather spreads, on the semiconductor chip-mounting 4a, wide with a width wf2 larger than the width w2 of the bonding land 2 as shown in FIG. 7 and with a length Lf2 larger than the length L2 of the bonding land 2 as shown in FIG. 8. This causes short circuits and deteriorations in insulating resistance. The aforementioned width wf2 is 100 .mu.m and the length Lf2 is 50 .mu.m.
Further, since the thermal expansion coefficient of the conventional mounting board 4 is larger than that of silicon which is the material for the semiconductor chip 1, when the sealing resin 8 is heated and set after the semiconductor chip 1 is mounted onto the mounting board 4, a stress is generated due to a difference of thermal expansion coefficients of the mounting board 4 and the semiconductor chip 1. This stress acts to a bonded part between the bump 6 and the bonding land 2 where the bonding strength is small as discussed above, and consequently, a resistance value at the bonded part might be increased or the bonded part might be disconnected.
The semiconductor chip-mounting board 4 uses the material mainly composed of glass epoxy resin as mentioned before. Therefore, when the temperature of the semiconductor chip-mounting board 4 rises to not lower than the glass transition point (Tg), a thermal expansion coefficient .alpha.1 before the glass transition point of the board 4 is increased by 5-7 times up to a thermal expansion coefficient .alpha.2 at the glass transition point, as is clearly shown in FIG. 11, whereby a deformation amount of the board 4 becomes large.
The semiconductor chip-mounting board 4 with the semiconductor chip 1 mounted is passed through the drying/setting process at 120.degree. C. for two hours so as to dry and set the above bonding material 7 formed at the bumps 6. At this time, when the temperature decreases from 120.degree. C. after the bonding material 7 is set, the semiconductor chip-mounting board 4 warps to be a semiconductor chip-mounting board 4' shown in FIG. 12.
Moreover, the sealing resin 8 injected between the mounting board 4 and the semiconductor chip 1 after the above drying/setting process is subjected to the setting process at 120.degree. C. for two hours. When the temperature decreases from 120.degree. C. after the sealing resin 8 is set, the semiconductor chip-mounting board 4 warps to be a semiconductor chip-mounting board 4' shown in FIG. 13.
When the mounting board 4 is mounted to the circuit board by the SMT prior to the above setting processes of the bonding material 7 and sealing resin 8, the temperature of the mounting board 4 is raised at this time to a maximum of 230.degree. C. That is, the mounting board 4 is accompanied with warping also on the occasion of the SMT mounting.
Since the glass transition point of the conventional semiconductor chip-mounting board 4 is lower than the temperature at which the bonding material 7 or sealing resin 8 is dried/set, this enlarges the above warp of the mounting board 4 resulting from the difference of thermal expansion coefficients. Consequently, the resistance value at the bonded part might be increased and the bonded part might be disconnected.
In the conventional semiconductor chip-mounting board 4, the solder resist 9 is arranged in the vicinity of the end face 1b of the semiconductor chip 1. Therefore, the sealing resin 8 might not form the fillet sufficiently. In addition, because of the small adhering strength of the sealing resin 8 onto the solder resist 9, the solder resist 9 might be separated during an environmental test from the sealing resin 8 at an interface therebetween, which is an important issue from the viewpoint of product quality.
When the sealing by the sealing resin 8 is to be inspected, since an injection opening for the sealing resin 8 is formed at a position difficult to find in the conventional mounting method, it takes a large amount of time for an automatic inspecting device to recognize the injection opening and inspect the formed fillet of the sealing resin 8, thereby disadvantageously decreasing productivity.
If leadless semiconductor chips conformed to the SMT and conventional lead components are mixedly arranged at the mounting board, since the SMT is carried out first, the semiconductor chip-mounting board 4 warps in the heating process thereto, and therefore the bonding resistance at the bonded part is increased. At the same time, the reliability at the bonded part might be lowered because of the adhesion of dust and residual flux, which greatly might influence product quality. Also an additional process is required for cleaning the above dust, etc., whereby the productivity is decreased and costs are increased.